It is known in the art of semiconductor transistor devices that short channels are desirable in MOSFET devices, in order to achieve high frequency operation of the order of GHz. By "short channels" is meant those with source-to-drain separations of less than about 2 microns.
In the fabrication of short channel MOSFET devices with polycrystalline silicon gate electrodes, it is difficult to control the length of the polycrystalline silicon ("polysilicon") layer defining the self-aligned gate and hence the source-to-drain separation and the channel length: This length is thus subject to fluctuations from device to device in the usual mass fabrication techniques in which many such devices are simultaneously fabricated at a major surface of a single crystal semiconductive silicon body. Specifically, the actual channel length is so small in many of the devices whose channels are intended to be a micron in length that undesirable "punch-through" or "reach-through" of the depletion region of the drain to the source occurs during operation; thereby, device performance is severely degraded. Moreover, the electrical resistance between the source terminal and the semiconductor region controlled by the gate, as well as the electrical resistance between the drain and the load, tends to be excessive, especially in those devices having shallow junctions which are desirable to minimize "punch-through" or "reach-through" effects.
In a paper by S. Nishimatsu et al., entitled "Grooved Gate MOSFET", published in Japanese Journal of Applied Physics, Vol. 16 (1977), Supplement 16-1, pp. 179-183, at page 181, a method for making a MOSFET device characterized by a grooved gate is disclosed, using a first polysilicon layer for the source and drain contact electrodes and a second polysilicon layer for the gate electrode. These electrodes are mutually insulated from each other by a silicon dioxide layer which is grown on the first polysilicon layer prior to deposition of the second polysilicon layer. Such a device, however, requires the use of a maskless photolithography operation which becomes impractical at channel lengths less than about 2 microns. As a consequence of this limitation, the distance from source-to-drain cannot be made as small as desired, such as 0.5 micron to within .+-.5%, and the breakdown voltage tends to be unduly low. Moreover, the use of polysilicon as source and drain electrode material results in undesirably high source and drain access resistances.
It would, therefore, be desirable to have a method for making short-channel devices that alleviates these problems of the prior art.